Dr.-Ing. Amir Mabhout

Building agents that orchestrate EDAs

I spent years doing analog and mixed-signal chip work the hard way: schematics, layout, simulation, post-layout debug, tapeout pressure, and the small judgement calls that never fit cleanly into a textbook. Simra is the tool I wanted during those loops.

The current focus is simple: help semiconductor teams reuse proven IP faster without asking them to abandon Cadence, Synopsys, Siemens, Keysight, open-source flows, or the review gates they already trust. Simra sits beside the existing toolchain, runs the repetitive work, captures evidence, and brings engineers back in when judgement matters.

Before Simra I explored data ownership, crypto, agents, and consumer products. A lot of that was useful training, but the real pull was back to chip design: a difficult, high-trust field where better software can save expert engineers from endless manual glue work.

4 chip tapeouts including 22 nm FDSOI high-speed Ethernet PHY work and 180 nm energy harvesting.

5 IEEE publications first-author analog and mixed-signal papers across high-speed links, calibration, and energy harvesting.

Simra today EDA orchestration, simulation/debug loops, PDK-aware migration checks, and engineer-in-the-loop evidence.

Selected Work

Now

Simra

EDA orchestration for analog and mixed-signal teams: existing tools, private environments, repeatable evidence, and engineer signoff.

simulation loops PDK migration checks verification evidence workflow memory

Visit Simra

2011-2015

Master's in Microsystems Engineering

IMTEK, University of Freiburg. Multidisciplinary systems engineering across mechanical, fluidic, and electrical domains, with a focus on circuit and system design.

2016-2020

PhD in Mixed Signal Circuit Design

PhD work at TU Berlin with multiple tapeouts, including 22 nm FDSOI high-speed Ethernet PHY circuits and 180 nm energy-harvesting work.

First-author papers

A 9-bit, 45 mW, 0.05 mm² source-series-terminated DAC driver with echo canceller in 22-nm CMOS for in-vehicle communication IEEE Solid-State Circuits Letters, 2021
Impedance calibration technique canceling process and temperature variation in source terminated DAC drivers in 22nm FDSOI IEEE MWSCAS, 2019
A fully integrated charge pump using parasitics to increase usable capacitance by 25% and efficiency by up to 18% IEEE MWSCAS, 2017
Analysis and compensation technique canceling non-linear switch and package impedance effects of a 3.2GS/s TX-DAC IEEE MWSCAS, 2017
A digital calibration technique canceling non-linear switch and package impedance effects of a 1.6GS/s TX-DAC in 28 nm CMOS IEEE ISCAS, 2017

Co-authored papers

Advanced mixed-signal concepts exploiting the strong body-bias effect in CMOS 22FDX IEEE TCAS I, 2021
Body-bias techniques in CMOS 22FDX for mixed-signal circuits and systems IEEE ICECS, 2019
Analysis of package impedance effects on the linearity of source-series-terminated DACs IEEE MWSCAS, 2018

2021-2023

Teaching, software, and product reps

Taught electromagnetism, then built Datalatte and survey/data experiments. The useful lesson: start from a painful workflow, not from an ideology about technology.

2023-2024

Selected experiments

Used hackathons as fast product reps around privacy, data, social graphs, and agents. The through-line was learning how to ship quickly and test ideas with real users.

ETHMunich 2nd Place AI Track ETHRome 5 bounties ETHGlobal Bangkok Circles 1st bounty SAFE Agentathon agent matchmaking